1. Field of the Invention
The present invention relates to a semiconductor transistor, and more particularly to a high-hole-mobility transistor (HHMT) having a high-hole-mobility germanium channel structure on a silicon nanowire and fabrication method thereof.
2. Description of the Related Art
Throughout the history of semiconductor transistor development, a large number of high-electron-mobility transistors (HEMTs) using high-electron-mobility have been studied actively, but only a few high-hole-mobility transistors (HHMTs) with high-hole-mobility are studied.
This is because a large number of semiconductor materials having high-electron-mobility are present, but the semiconductor materials having high-hole-mobility are extremely rare.
Germanium has recently been studied for implementing germanium-based p-type metal-oxide-semiconductor field effect transistors (MOSFETs) due to its intrinsically high hole-mobility. However, there has been a limitation of techniques for getting enough high-hole-mobility of germanium because of a complexity of the manufacturing processing and a limitation of gate controllability.
For example, Korean Patent No. 10-0585111 discloses a technique for forming a channel region of germanium or silicon-germanium on three surfaces of a silicon body formed by patterning a silicon layer of a silicon-on-insulator (SOI) substrate. However, there are some problems related to this technique. Because the silicon body is formed by patterning the SOI substrate, the minimization of the silicon body is difficult. And because the gate is wrapped around the patterned SOI substrate on a gate insulating film additionally formed on the channel region, the gate controllability is reduced. Especially, because the gate insulating film such as a silicon oxide film, etc. is additionally formed on the channel region by a method such as a chemical vapor deposition (CVD) or an atomic layer deposition (ALD), it is difficult to get enough high-hole-mobility of a germanium channel by a carrier scattering at the interface between the gate insulating film and the germanium channel.
To solve the latter problem in the above patent, the present inventor has developed a technique disclosed in Korean Patent No. 10-1515071. In this technique, a gate insulating film is formed of a semiconductor material (e.g., AlxGa1-xAs) having a predetermined valence band offset or more than germanium instead of the conventional oxide film.
But, Korean Patent No. 10-1515071 remains unsolved problems such as an additional formation of a semiconductor material for a role of the gate insulating film and a reduction of a gate controllability to the channel region due to the gate formed on the top of it.